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PMG-130 Program SRAM Setup Control

The SRAM Setup and Configuration is the main user interactive window for developing new modulation schemes and activating them in a single step mode for testing. After the single step mode is finished, the user may save the modulation scheme developed in a SRAM SAVESET and or load it directly to the SRAM on the device selected.

The SRAM setup diagram below shows the parameters that re being set with the software. Each Frame may contain a user defined behavior by setting as many IBR as required for the controlled response of the PMG-130. Each frame may be activated sequentially via the digital control IO inputs or randomly under software control.

SRAM FRAMES AND BLOCKS ASSIGNMENTS

 

The following is the application software HMI that shows all the required parameters. The user changes the variables shown on the right by varying the frequency etc. fields in the MAIN Dialog then when that is set, go to the SRAM dialog and saves the parameters.  There are some automatic save features as well to just perform the initial setup of the SRAM screen then return to the MAIN screen and save the setup at will after changes are made. This is outlined in the Software users manual as well.

SRAM CONFIGURATION DIALOG

SRAM Setup Menu Group - The SRAM Setup MENU group allows the Loading and Saving of the SRAM Modulation schemes, read and write to the SRAM on the selected device, Clear all configurations for a NEW modulation scheme and return to the MAIN Window.

SRAM IBR OPTION TABS GROUP - The TABS GROUP vary depending on the options that have been installed on the PMG-130 device. The default is shown in Figure 2.19.0 along with two option TABS for Extended IBR control devices.

TAB SELECTED IBR's DISPLAY GROUP - The Default IBR group is shipped standard with all PMG-130 devices. If there are no other options installed, this will be the only one TAB shown.

SRAM EBR SETUP GROUP - The SRAM External Behavioral Registers group allows the user to setup the SRAM parameters in order to store BLOCKS and FRAMES to the SRAM at user selected addresses.  This is the area where the user sets up and controls the SRAM storage and scan addressing for custom modulation schemes.

SRAM IBR SELECT STORE GROUP - The SRAM IBR STORE GROUP is where the users selects the IBR addresses to change when using the PMG in REMOTE modes.  Depending on the options installed up to 255, (00-FF hex) IBR addresses are available to the user.  The default standard allows the user to access the first 64, (40 hex) addresses defined in the MAIN IBR Tab display.  The user selects a sequential group of addresses along with up to 48 decimal random IBR addresses to change.  The addresses displayed are all in hex format for this session.

 STATUS BAR - This is the Status bar that will display the status of each operation the user performs during this session.

 HELP - This button is common to most screens and will display the help window for the user to select the specified PMG-130 user manual to open. All manuals are in PDF format and require a PDF reader to view the manuals.

SRAM Navigation Menu Group

 LOAD FILE - The Load File allows the user to load a SRAM SAVESET to the local SRAM buffer array for processing. The data loaded is stored locally only, the SRAM on board the device does not get addressed during this operation.

 SAVE FILE  - The Save File allows the user to save a SRAM saveset to a user specified file name that is stored in the SRAM buffer array.  The data saved to disk does not access the SRAM on board the device during this operation.

 SRAM DATA I/O - The SRAM Data I/O button brings up the SRAM Data Transfer Window. This window allows data access to and from the devices on-board SRAM.  The current selected device is the only device effected for the data transfer.

 CURRENT FILE ACCESSED - This is the last file accessed by the Save or Load Command.

 NEW - This button will clear the SRAM buffer arrays and all associated variables for the SRAM to a known state for a NEW IBR block to be created.

 RETURN - This button will return to the MAIN Display program. If any IBR store functions were executed, the current position and addresses are kept and a set of controls to continue the store IBR뭩 are displayed on the MAIN DISPLAY.

SRAM EBR Control Group Setup

The EBR, (External Behavioral Register) setup group is the starting point for all SRAM configuration activity. There are several data entry areas that allow the user to configure the SRAM addresses and view the SRAM data stored in the local SRAM buffer array.  All transactions to and from the selected device on-board SRAM are from the SRAM addresses set in this area.  The user may save the data to a file or load the current frame selected when in Frame View mode to the PMG IBR뭩 displayed for the selected frame. This allows single stepping through the modulation scheme or frequency scheme stored in the local buffer array.

 SRAM CURRENT ADDRESS - This is the Current SRAM address that will be used as a reference for the next 밪tore IBR Word or 밪tore IBR Group operation for the create SRAM mode. In the View Frame mode  this is the SRAM starting address of the current frame being viewed.  This address is automatically calculated after each Store or View operation executed.

 CURRENT IBR DATA & ADDRESS  - This is the current IBR address and associated data that will be stored to the SRAM Current Address field when the 밪tore IBR Word  button is pushed. It is also the last IBR window the mouse was clicked on.  In the read address mode, activated by entering an address in the 밪RAM Current Address field, it is the data associated with the entered 밪RAM Current Address field.

 STORE CURRENT IBR DATA & ADDRESS  - The Store IBR Word Button will store the IBR address and Data displayed in  Current IBR addr & Data fields to the SRAM address shown in the SRAM Current Address field.  After the store sequence is completed the SRAM current address increments and is ready for the next operation. This allows the user to build a frame with single IBR operations or to change a particular byte within a frame at random.

 SETUP VIEW  / FRAME VIEW  - The 밪ETUP View / 밊RAME View Toggle Push On-Push Off  Button allows the user to view between the PMG-130 current device settings and the Current SRAM buffer arrays selected Frame. The Frame reference is the address shown in the BLOCK Reference Address field.  Items  and  are also used to display the proper frame number selected.  The relative address is defined as:

View Frame SRAM Address = BLOCK Reference Address Frame Size View Current Frame Value

The SRAM Current address field is the starting point for the frame referenced from the beginning of the BLOCK Reference Address field.  The user may also change the current VIEW FRAME IBR data for those areas that are allowed and then transfer it to the PMG-130 active core to test the results. The user may also save the current VIEW FRAME by pressing the Store IBR Sequence button on the LOAD SRAM group area. Once in the Frame View the user may use the up-down arrow keys to increment-decrement through the frames or just enter a frame number to view.  The displays are automatically updated and the associated data displayed.

 TRANSFER PMG ACTIVE - This Button will transfer the current viewed frame to the PMG-130 active core. Only the IBR뭩 in the current FRAME are transferred and updated.  The user must be in the 밊rame View mode for this operation. If the user is not in the 밊rame View mode the action is defaulted to no operation and the PMG-130 remains unchanged.

 FRAME TO VIEW ENTRY - This field selects FRAME to view when in the 밊rame View mode.

 SCAN COUNT ENTRY - This value is this field is the number of Scans the user wants to perform in the modulation scheme. It is an active window for decimal and hex displays. When the number is ready to be transferred to the current device,  the user will press the 밪et SCAN Cntr button.

 SET SCAN COUNTER - This Button will store the value displayed in the Decimal field to the Scan Count Register on the selected PMG-130 device.  This button performs an I/O Write to the Scan Counter EBR-04 .

 NUMBER OF FRAMES SETUP - The Number of Frames field is a reference for the user.  It is used to calculate the actual size and the number of IBR뭩 to be transferred.  If this is set to zero, then one frame will be setup when the user calls the SRAM TRANSFER Dialog. This field increments each time the 밪tore IBR Sequence on the IBR ADDRESS - RANDOM SRAM LOAD SEQUENCE setup area, (shown in Figure 2.23.0) is pushed.

 IBR FRAME SIZE - The IBR FRAMES Size is the number of IBR Bytes to be transferred during a remote operation each time a pulse is applied to the START pin on the REMOTE I/O Connector.  The data is either stored in the holding buffer and waits for an update pulse or the user may generate the update pulse at the last IBR address transferred to the holding registers.

 SET SRAM BLOCK START ADDRESS - The 밪et BLOCK Adr Button  will store the value displayed in the Decimal field  of the BLOCK Reference Address to the PMG-130 EBR-08. This button performs an I/O Write to the BLOCK Start Address Register EBR-08.  This allows the user to manually sequence through several modulation schemes (BLOCKS) stored in the devices on-board SRAM.

 BLOCK REFERENCE ADDRESS - The BLOCK Reference is the actual SRAM Start Address of the BLOCK of Frames for remote control of the modulation scheme.  This field is also used for the manual setup operations as well.

 

SRAM IBR Hex Data Display TAB

The SRAM IBR data display area is where we start programming the SRAM BLOCKS and FRAMES.  The display to the right is the standard display for all PMG-130 devices.  This is the core IBR뭩 that the user has access to. If other options are included then additional IBR TABS will be located in the TABS menu.  The user just has to click on an individual IBR display then move to the SRAM Load Sequence group window and click on the field location where the IBR address is to be placed.  This process works for all IBR and the current TABS display areas. The display area is automatically updated as each TAB is selected to the proper IBR addresses for that tab.  This allows the user to freely roam through the TABs to select the desired IBR and place it in the Load sequence group for programming.

For the Standard PMG-130 configuration, the users has two separate optical isolated eight bit digital output groups that have their own user defined label area. The label fields allow the user to define or clarify the application of the port.  When this is changed the user may save the setup in the MAIN window or use the Command -line File option to setup the device at power on. The data area is a user defined area and acts like any other IBR area for programming.  The read only areas are changed in the MAIN Dialog Display.

 TABS MENU for IBR OPTIONS - The TABS Menu defines the options installed in the device. The PMG-130 has several options which add TAB groups of IBR뭩 for users programmability.  All options are accessed by byte wide IBR뭩 allowing user defined labels and data areas. This adds clarity for the applications and for programming.

 SELECTED TAB DATA DISPLAY AREA  - This is the display area for each TAB selected. The user is free to move among the TABs to program the selected IBR뭩

 OPTIONS LABELS USER ENTRY - The standard configuration allows two user configured IBR labels. These labels are limited to 14 characters.

 OPTIONS DATA USER ENTRY - The standard configuration allows two user configured IBR byte wide data areas.

 

SRAM IBR Random Load Sequence Setup

The IBR ADDRESS - RANDOM SRAM LOAD SEQUENCE Group allows the user to develop complex modulation schemes.  The group consists of a block of random address entry fields and one sequential group set,  밊rom - To fields.  The user may clear the group and start fresh without changing any previous group data saved.  The user may also store the group of IBRs in both areas to the local SRAM buffer array for later processing.  Once the IBR sequence is established the user may freely move from Dialog to Dialog window and change any parameters that effect the IBRs selected and store the results from MAIN or the SRAM Setup and Configure windows.

To use this group, the user just has to single click on any IBR display area in the TABs Display areas then move to the SRAM IBR random load sequence group window and click on the display area to place the address.  This will put the selected IBR address in that display area.  The user may repeat this process to develop the desired sequence.  The user may also select a group of windows the same way. Only the IBR address is placed in this group fields.  The IBR addresses and data are extracted automatically.  The current data and address are always displayed in the EBR Control group window as shown in Figure 2.22.0.

 CLEAR SEQUENCE - This button will clear the contents of the SRAM Load Sequence group. Any previous data stored in the local SRAM buffer array will not be affected by this operation.

 GROUP  IBR  SELECT  - This group allows the user to enter a contiguous set of IBR addresses. The user selects the start IBR address in the 밊rom and the Ending IBR address in the 밫o fields.

 STORE DISPLAYED SEQUENCE - This button will store the group of IBR addresses entered in both group areas to the SRAM Buffer array starting at the address displayed in the 밪RAM Current Address field in the SRAM EBR Control Group shown as  in Figure 2.22.0.  When in the VIEW FRAME mode, only the current frame being viewed is stored at the 밅urrent Starting Address field and is displayed. The number if IBR뭩 displayed is the value in the 밊rame Size filed.

 RANDOM IBR ADDRESS ENTRY - This is a block of up to 48 random IBR address entries the user may use for creating the modulation scheme application.  The user may select any IBR address at random and place it in this area.  The first blank area detected defaults to the end of the random IBR address sequence.  Since the update command transfers all the IBR holding registers to the active core at the same time, it does not matter what order the IBR addresses are entered to the holding registers. All transfers to the holding registers are at an 80 nanoseconds per address rate with a 20 nanoseconds end of transfer overhead.  As an example, six IBR addresses may be transferred in 500 nanoseconds.  For more information refer to the PMG-130 Hardware Reference, Manual Theory of Operation chapter.

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