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This is the updated design of the Universal Programmer that will cover all the various chip manufacturers of CPLD's /FPGA's that use a parallel port programmer with their software. This updated design features a completely programmable parallel port or serial port programmer with socket mounted parts for easy repair. This programmer will allow the user to create their own programmer if they so desire since it uses the standard parallel port I/O bus supported by most operating systems. I used Altrera's CPLD for this design, the software is free to download from Altera since we use mostly Alters components in our designs.
The following quick development is something we were forced to do in our prototype lab for cost reduction. Talking with other engineers and manufactures, we all seem to have similar issues with programmers. With the increased use of CPLD's and FPGA's in our designs, I am constantly changing the JTAG programming connectors and in several cases purchasing new programmers to meet the customer specifications. This means making up new cables specific to CPLD manufacturers along with other programming issues. Usually I would add a programming interface on board to accommodate programming, however the way technology changes, it is better to add as little as possible to the board. A micro 6 or 8 pin connector is what I am using on some designs that require space, normally I would use a standard 50mil ctr header. What I wanted was a simple programmer that would meet the JTAG needs of a variety of I/O voltages as well as some programmability to change connectors, pin assignments and chip manufacturers if needed. This lead to BASIL Networks Universal -200 Programmer shown below. The programmer fits on a 3.5" x 5" two-sides through hole standard PCB. This design itself is for sale, we do not sell individual programmers, for those who want a programmer that can be programmed for just about any JTAG or FPGA chip manufacturer using the manufacturers standard JTAG programmer. It is a lot easier to replace the $1.50 chip than a $150 programmer as well as save time in shipping. Additional features as PIC and ARM programmer interface, full analog low voltage 1.25 volt to 5.0 volt chip programmability may be added easily. Both Parallel and USB support will also be added in the next revision.
The Universal-200, for lack of a better name, is a Parallel Port programmable interface with an additional 44 Pin PLCC on the board that may be used for anything the user wants. Hence, additional JTAG programming that is compatible for many of the multiple manufacturers of CPLD and JTAG programming software. Additional special test bits for a dedicated application for security. The interface is socketed for easy repair and IC replacement . The block diagram below shows the separate sections of the Universal Programmer-200. In order to program the CPLD you will have to supply 3.3 volts DC to the CPLD Power pins. The I/O connectors are standard 10 pin 0.1x0.1" center headers that use five pins for the CPLD I/O and two for ground. This leaves three pins for user defined pins separate from the CPLD pins.
This design is not rocket science technology, ordering boards and parts was a ten day wait. The board is a standard two sided FR4 alloy through hole board. You could buy a plastic case for a few dollars if you desire to. With this device I am able to program the CPLD to accommodate several cable connector types as well as interface to several types of programmers such as Xilinks, Altera, Actel and others. The manufactured product would be RoHS compliant. The board uses two Altera EPM3064AALC44 CPLD which are readily available from several distributors. Lattice and Actel also make PLCC chips as well, however selected Altera for this design. Revisions to other manufacturers is very straight forward. The interface chip to the CPLD is a 74HC244 dip buffer that will function with a variety of I/O voltages making it suitable for 2.5, 3.3 and 5 volt I/O CPLD's and FPGA's. The board has two power sources one for the on board 3.3 volt CPLD and one for the parallel port programmer. There is a Voltage Regulator on boar that will allow 5 to 12 volts DC to be connected that will supply the two CPLDs. The Multi-Voltage Interface buffer power is supplied by the device being programmed if it is other than 3.3 volts. If you want to use the onboard supply (3.3V) you can use the jumper to bridge the power (J3) to both the CPLD and the programmer and connect the 3.3 volts to Ground and VC3 pads, then you will only need 5 pins to program the application, 4 JTAG and Ground.
If you are interested in purchasing this design, have comments on the design or something you would like to see in the next revision, please contact Sal (JT) for more information.
Best Regards,
Sal (JT)
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